| DIGITALINTERFACE |
| 1. |
FPGA |
Xilinx ZynqUltraScale+ RFSoC |
| 2. |
Operating Voltage |
+12V DC Input |
| 3. |
Power Consumption |
60Watt |
| 4. |
Memory Interface(PS) |
- 8GB DDR4 SDRAM
- 2GB QSPI Flash Memory
- 64GB eMMC Flash Memory
|
|
5. |
Memory Interface(PL) |
- 4GB DDR4 SDRAM
- 1GB NOR Flash Memory
|
| 6. |
ERT Interface 1310nm |
x1 RIO ERT SMF Transceiver |
| 7. |
ERT Interface 850nm |
x1 RIO ERT MMF Transceiver |
| 8. |
1GEthernet |
x3 RJ45 |
| 9. |
10G Copper Ethernet |
x1 ERT SMF Transceiver |
| 10. |
RS232 |
x1 |
| 11. |
RS422 serial |
x2 |
| 12. |
GPS Antenna Input |
x2 SMA Connectors |
| 13. |
TTL Control lines |
TOTAL 32 TTL Control lines connected to 51 pin uD connector
- 16 TX lines
- 12 High Current TX lines
- 4 RX lines
|
| 14. |
RS 422 Differential lines |
Total 4 pairs connected to 51 pin uD connector
|
| 15. |
Audio codec Interface |
1 channels * 3 Audiolines |
| RF INTERFACE |
| 16. |
ADC Input |
8 No’s of SMA Connector |
| Frequency Range |
1MHz-6GHz |
| Sampling Frequency |
1-5GSPS |
| Signal Powers |
-65 to 0 dBm |
| Amplitude matching across frequency |
1 MHz- 6 GHz (within+/-0.5dB) for each ADC |
| 17. |
DAC Output |
8No’s of SMA Connectors |
| Frequency Range |
1 MHz - 6GHz |
| Sampling Frequency |
1-7 GSPS |
| Signal Powers |
-45 to 5dBm. |
| Amplitude matching across frequency |
1 MHz - 6 GHz (within +/-1dB) for each DAC |
| Phase noise |
< -160 dBc/Hz @1 KHz for each DAC |
| 18. |
External reference Clock |
10MHz |
| 19. |
Mechanical dimensions |
187.5 x 244 x 24.5 |